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NTMFS4744N Power MOSFET 30 V, 53 A, Single N-Channel, SO-8 FL Features * * * * Low RDS(on) to Minimize Conduction Losses Low Capacitance to Minimize Driver Losses Optimized Gate Charge to Minimize Switching Losses These are Pb-Free Devices V(BR)DSS http://onsemi.com RDS(on) MAX 10 mW @ 10 V 14 mW @ 4.5 V ID MAX 53 A Applications * CPU Power Delivery * DC-DC Converters * Low Side Switching MAXIMUM RATINGS (TJ = 25C unless otherwise stated) Parameter Drain-to-Source Voltage Gate-to-Source Voltage Continuous Drain Current RqJA (Note 1) Power Dissipation RqJA (Note 1) Continuous Drain Current RqJA (Note 2) Power Dissipation RqJA (Note 2) Continuous Drain Current RqJC (Note 1) Power Dissipation RqJC (Note 1) Pulsed Drain Current tp=10ms Steady State TA = 25C TA = 85C TA = 25C TA = 25C TA = 85C TA = 25C TC = 25C TC = 85C TC = 25C TA = 25C PD IDM TJ, TSTG IS dV/dt EAS PD ID PD ID Symbol VDSS VGS ID Value 30 20 11 8.0 2.2 7.0 5.0 0.88 53 38 47.2 106 -55 to +150 46 6.0 286 W A C A V/ns mJ W W A Unit V V A 30 V N-Channel D G S MARKING DIAGRAM D 1 A SO-8 FLAT LEAD CASE 488AA STYLE 1 S S S G D 4744N AYWWG G D D Operating Junction and Storage Temperature Source Current (Body Diode) Drain to Source dV/dt Single Pulse Drain-to-Source Avalanche Energy (VDD = 50 V, VGS = 10 V, IL = 24 Apk, L = 1.0 mH, RG = 25 W) Lead Temperature for Soldering Purposes (1/8" from case for 10 s) 4744N = Specific Device Code A = Assembly Location Y = Year WW = Work Week G = Pb-Free Package (Note: Microdot may be in either location) ORDERING INFORMATION TL 260 C Device NTMFS4744NT1G NTMFS4744NT3G Package Shipping SO-8 FL 1500 Tape & Reel (Pb-Free) SO-8 FL 5000 Tape & Reel (Pb-Free) Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. (c) Semiconductor Components Industries, LLC, 2007 1 July, 2007 - Rev. 4 Publication Order Number: NTMFS4744N/D NTMFS4744N THERMAL RESISTANCE MAXIMUM RATINGS Parameter Junction-to-Case (Drain) Junction-to-Ambient - Steady State (Note 1) Junction-to-Ambient - Steady State (Note 2) Symbol RqJC RqJA RqJA Value 2.65 56.9 142.4 C/W Unit 1. Surface-mounted on FR4 board using 1 sq-in pad, 1 oz Cu. 2. Surface-mounted on FR4 board using the minimum recommended pad size. ELECTRICAL CHARACTERISTICS (TJ = 25C unless otherwise specified) Parameter OFF CHARACTERISTICS Drain-to-Source Breakdown Voltage Drain-to-Source Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current V(BR)DSS V(BR)DSS/ TJ IDSS VGS = 0 V, VDS = 24 V TJ = 25 C TJ = 125C VGS = 0 V, ID = 250 mA 30 10 1.0 10 100 V mV/C mA nA Symbol Test Condition Min Typ Max Unit Gate-to-Source Leakage Current ON CHARACTERISTICS (Note 3) Gate Threshold Voltage Negative Threshold Temperature Coefficient Drain-to-Source On Resistance IGSS VDS = 0 V, VGS = 20 V VGS(TH) VGS(TH)/TJ RDS(on) VGS = VDS, ID = 250 mA 1.5 5.0 2.5 V mV/C VGS = 10 V to 11.5 V ID = 30 A ID = 15 A ID = 10 A 7.6 7.3 7.3 10.4 10.1 9.9 25 14 S 10 mW VGS = 4.5 V ID = 30 A ID = 15 A ID = 10 A Forward Transconductance gFS VDS = 15 V, ID = 15 A CHARGES, CAPACITANCES & GATE RESISTANCE Input Capacitance Output Capacitance Reverse Transfer Capacitance Total Gate Charge Threshold Gate Charge Gate-to-Source Charge Gate-to-Drain Charge Total Gate Charge SWITCHING CHARACTERISTICS (Note 4) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time td(ON) tr td(OFF) tf VGS = 4.5 V, VDS = 15 V, ID = 30 A, RG = 3.0 W 12 203 14 83 ns CISS COSS CRSS QG(TOT) QG(TH) QGS QGD QG(TOT) VGS = 11.5 V, VDS = 15 V; ID = 30 A VGS = 4.5 V, VDS = 15 V; ID = 30 A VGS = 0 V, f = 1 MHz, VDS = 12 V 1300 550 132 10 0.9 1.8 5.9 25 37 nC nC 17 pF 3. Pulse Test: pulse width v 300 ms, duty cycle v 2%. 4. Switching characteristics are independent of operating junction temperatures. http://onsemi.com 2 NTMFS4744N ELECTRICAL CHARACTERISTICS (TJ = 25C unless otherwise specified) Parameter SWITCHING CHARACTERISTICS (Note 4) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time DRAIN-SOURCE DIODE CHARACTERISTICS Forward Diode Voltage VSD VGS = 0 V, IS = 30 A TJ = 25C TJ = 125C 0.78 0.7 37 VGS = 0 V, dIS/dt = 100 A/ms, IS = 30 A 21 17 37 nC 60 ns 1.2 V td(ON) tr td(OFF) tf VGS = 11.5 V, VDS = 15 V, ID = 30 A, RG = 3.0 W 7.0 94 23 4.7 ns Symbol Test Condition Min Typ Max Unit Reverse Recovery Time Charge Time Discharge Time Reverse Recovery Charge PACKAGE PARASITIC VALUES Source Inductance Drain Inductance Gate Inductance Gate Resistance tRR ta tb QRR LS LD LG RG TA = 25C 0.65 0.005 1.84 2.0 5.0 nH W 3. Pulse Test: pulse width v 300 ms, duty cycle v 2%. 4. Switching characteristics are independent of operating junction temperatures. http://onsemi.com 3 NTMFS4744N TYPICAL PERFORMANCE CURVES 32 ID, DRAIN CURRENT (AMPS) ID, DRAIN CURRENT (AMPS) 10 V 4.5 V 3.5 V TJ = 25C 24 32 24 3V 16 2.8 V 8 2.6 V 0 0 1 2 3 4 2.4 V 5 16 TJ = 125C 8 TJ = 25C TJ = -55C 0 0 1 2 3 4 5 6 VGS, GATE-TO-SOURCE VOLTAGE (VOLTS) VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) Figure 1. On-Region Characteristics RDS(on), DRAIN-TO-SOURCE RESISTANCE (W) RDS(on), DRAIN-TO-SOURCE RESISTANCE (W) Figure 2. Transfer Characteristics 0.1 ID = 30 A 0.08 0.020 VGS = 10 V 0.016 TJ = 125C TJ = 25C 0.06 0.012 0.04 0.008 0.02 0 2.6 0.004 0 TJ = -55C 3 3.4 3.8 4.2 4.6 5 0 5 10 15 20 25 30 VGS, GATE-TO-SOURCE VOLTAGE (VOLTS) ID, DRAIN CURRENT (AMPS) Figure 3. On-Resistance vs. Gate-to-Source Voltage RDS(on), DRAIN-TO-SOURCE RESISTANCE (NORMALIZED) 1.8 1.6 1.4 1.2 1.0 0.8 0.6 -50 0.1 -25 0 25 50 75 100 125 150 0 ID = 9 A VGS = 10 V IDSS, LEAKAGE (nA) 100 1000 Figure 4. On-Resistance vs. Drain Current and Temperature TJ = 125C 10 TJ = 85C 1 TJ = 25C 6 12 18 24 30 TJ, JUNCTION TEMPERATURE (C) VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) Figure 5. On-Resistance Variation with Temperature Figure 6. Drain-to-Source Leakage Current vs. Drain Voltage http://onsemi.com 4 NTMFS4744N TYPICAL PERFORMANCE CURVES 2000 TJ = 25C VGS = 0 V C, CAPACITANCE (pF) 1600 Ciss 5 VGS , GATE-TO-SOURCE VOLTAGE (VOLTS) QT QGS QGD 4 1200 Coss 800 3 2 400 Crss 0 0 4 8 12 16 20 1 0 0 4 8 QG, TOTAL GATE CHARGE (nC) ID = 30 A TJ = 25C 12 GATE-TO-SOURCE OR DRAIN-TO-SOURCE VOLTAGE (VOLTS) Figure 7. Capacitance Variation 1000 IS, SOURCE CURRENT (AMPS) 10 Figure 8. Gate-To-Source and Drain-To-Source Voltage vs. Total Charge VGS = 0 V tr t, TIME (ns) 100 tf TJ = 150C 1 TJ = 25C 10 td(off) td(on) VDS = 15 V ID = 30 A VGS = 4.5 V 1 10 RG, GATE RESISTANCE (OHMS) 100 1 0.1 0.2 0.4 0.6 VSD, SOURCE-TO-DRAIN VOLTAGE (VOLTS) 0.8 Figure 9. Resistive Switching Time Variation vs. Gate Resistance EAS, SINGLE PULSE DRAIN-TO-SOURCE AVALANCHE ENERGY (mJ) 1000 VGS = 2.0 V SINGLE PULSE 100 TC = 25C 10 ms 10 100 ms 1 ms 1 10 ms 300 Figure 10. Diode Forward Voltage vs. Current ID = 24 A ID, DRAIN CURRENT (A) 200 100 0.1 RDS(on) LIMIT Thermal Limit Package Limit 0.1 dc 100 0.01 1 10 VDS, DRAIN-TO-SOURCE VOLTAGE (V) 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (C) 175 Figure 11. Maximum Rated Forward Biased Safe Operating Area Figure 12. Maximum Avalanche Energy vs. Starting Junction Temperature http://onsemi.com 5 NTMFS4744N TYPICAL PERFORMANCE CURVES 100 I D, DRAIN CURRENT (AMPS) 25C 100C 125C 10 1 1 100 10 PULSE WIDTH (ms) 1000 Figure 13. Avalanche Characteristics http://onsemi.com 6 NTMFS4744N PACKAGE DIMENSIONS DFN6 5x6, 1.27P (SO8 FL) CASE 488AA-01 ISSUE C 2X NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION D1 AND E1 DO NOT INCLUDE MOLD FLASH PROTRUSIONS OR GATE BURRS. 2X 0.20 C D 2 D1 6 5 A B 0.20 C 4X E1 2 E c 1 2 3 4 q A1 TOP VIEW 3X C SEATING PLANE 0.10 C A 0.10 C SIDE VIEW 8X e DETAIL A DIM A A1 b c D D1 D2 E E1 E2 e G K L L1 M q MILLIMETERS MIN NOM MAX 0.90 1.00 1.10 0.00 --0.05 0.33 0.41 0.51 0.23 0.28 0.33 5.15 BSC 4.50 4.90 5.10 3.50 --4.22 6.15 BSC 5.50 5.80 6.10 3.45 --4.30 1.27 BSC 0.51 0.61 0.71 0.51 ----0.51 0.61 0.71 0.05 0.17 0.20 3.00 3.40 3.80 0_ --12 _ SOLDERING FOOTPRINT* DETAIL A 3X 4X b e/2 1 4 STYLE 1: PIN 1. SOURCE 2. SOURCE 3. SOURCE 4. GATE 5. DRAIN 6. DRAIN 1.270 0.750 4X 0.10 0.05 CAB c L 1.000 0.965 1.330 2X K E2 L1 6 5 0.905 4.530 0.475 2X 0.495 M 3.200 G D2 BOTTOM VIEW 4.560 2X 1.530 *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P Box 5163, Denver, Colorado 80217 USA .O. Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81-3-5773-3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative http://onsemi.com 7 NTMFS4744N/D |
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